测量和试验台

Analyze performance metrics of analog and mixed-signal systems

Analyze different foundation blocks and system-level models of mixed-signal systems using measurement blocks and testbenches. You can validate a block from the Mixed-Signal Blockset™ library, or you can validate your own customized blocks.

For PLL, use the measurement blocks to analyze performance metrics such as phase noise, reference and fractional spurs, aperture jitter, timing impairments, and lock time. Use block-specific testbenches to validate your customized blocks.

对于ADC，使用测量块来分析关键性能度量标准，例如光圈抖动，SNR，SINAD，噪声底板，偏移误差和增益错误。

Use a system-level testbench to validate your PLL and ADC models.

Apps

Mixed Signal Analyzer

Analyze circuit simulation data

Blocks

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PLL测量和试验台

Lock Time Measurement	Measure time a PLL takes to reach target frequency within given tolerance
Phase Noise Measurement	Compute phase noise at specific frequency offset vectors
PFD and Charge Pump Testbench	Generic test environment for phase/frequency detectors and charge pumps
VCO Testbench.	通过测量相位噪声度量或VCO特性来验证电压控制振荡器（VCO）
PLL Testbench	Validate PLL system by measuring operating frequency, lock time, and phase noise

ADC测量和试验台

ADC AC测量	Measure AC performance metrics of ADC output
ADC DC Measurement	测量ADC输出的直流性能度量
ADC Testbench.	Measures DC and AC performance metrics of ADC output

DAC Measurement and Testbenches

DAC DC Measurement	Measure DC performance metrics of DAC output
DAC AC Measurement	Measure AC performance metrics of DAC output
DAC Testbench.	Measure DC and AC performance metrics of DAC output

Jitter, Timing, and Visualization

时钟抖动测量	Measure jitter in periodic signals
Aperture Jitter Measurement	测量周期信号的孔径抖动
定时测量	测量时段，频率，占空比，上升时间，下降时间和信号的延迟
Eye Diagram Scope	Display eye diagram of time-domain signal

Functions

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PLL Functions

`phaseNoiseMeasure`	Measure and plot phase noise profile of time or frequency-domain signal
`phaseNoiseToJitter`	Measure RMS phase jitter from phase noise data

ADC Functions

inldnl 我ntegral nonlinearity (INL) and differential nonlinearity (DNL) of data converters

定时功能

`TimeDomainSignal2Risetime.`	Measure rise time of time domain signal
`timedomaineignal2fallime.`	Measure fall time of time domain signal
`timeDomainSignal2DutyCycle`	Measure duty cycle of time-domain signal

Featured Examples

Phase Noise at PLL Output

预测锁相环（PLL）的输出处的相位噪声，使用PLL测试台模拟PLL，并将模拟结果与理论预测进行比较。

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Effect of Metastability Impairment in Flash ADC

Customize a flash Analog to Digital Converter (ADC) by adding the metastability probability as an impairment. You can measure the metastability probability impairment to validate your implementation. The example also shows the effect of metastability on the dynamic performance of the flash ADC. When the digital output from a comparator is ambiguous (neither zero nor one), the output is defined as metastable. The ambiguous output is expressed asNaN. This example model uses a MATLAB function block to add the metastability impairment to a flash ADC architecture. Another subsystem reports the metastability probability on the fly.

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