新兴的5G网络在毫米波谱中运行，这意味着它们可以以更高的速度携带更多数据，并且比4G网络更低的延迟。虽然毫米波谱技术具有很大的潜力，但它还为设备制造商提供了设计挑战。例如，毫米波谱中的信号由大气和其他物体比较低频率信号更加衰减。
我的同事和我正在开发带有专用RF电子硬件的无线电前端，通过使用波束成形聚焦毫米波信号功率来克服这种衰减。我们的设计包括多用户，多输入和多输出（MU-MIMO）技术。
要测试和展示这些设计，我们在Matlab中实现了我们自己的数字基带®and Simulink®（图1）。通过从无线HDL Toolbox™调整LTE Golden参考模型并将其部署到Zynq，我们加速了实现的实现®UltraScale +™RFSOC板使用HDL Coder™。这种方法保存了我们至少一年的工程努力，并使我能够自己完成实施，而无需聘请额外的数字工程师。
Figure 1. LTE digital baseband receive chain modeled in Simulink.
建模和模拟数字基带
开箱即用，带有无线HDL工具箱提供的Golden Reference LTE模型提供了许多关键功能，例如主信息块（MIB）解码。我使用这些功能来构建自定义4G类似的OFDM收发器链，为现有定时恢复，运营商恢复和均衡添加增强。
I simulated this transceiver chain with a simple channel model from Wireless HDL Toolbox. The simulations enabled me to validate the baseband model by evaluating and visualizing metrics such as symbol error rate (SER) and error vector magnitude (EVM) for various levels of noise (Figure 2).
图2.作为信噪比（SNR）的函数的EVM（左）和SER（右）的图。
在Zynq RFSoC硬件上实现基带
After verifying the digital model through Simulink simulations, I generated RTL code from the model with HDL Coder and deployed it to the Zynq UltraScale+ RFSoC ZCU111 board. The generated code was both efficient and readable. I verified the implementation by performing digital loop-back tests on the Zynq board’s FPGA, passing the transmit output directly back into the receive chain. I followed those tests with analog loop-back tests, which incorporated the analog-to-digital (ADC) and digital-to-analog (DAC) converters on the board (Figure 3).
图3.显示用RF像素无线电前端以HDL实现的数字基带的完整系统图。
此时，我可以使用MATLAB运行完整的板到板测试并探索RF损伤的影响，以分析从电路板捕获的数据，生成星座图，评估算法增强，以解决损伤。
Rapid Design Iterations
In the past, I’ve worked in more traditional workflows in which an RTL team implements the design produced by the systems team. The iterations in this workflow tend to take a long time; it can take weeks to implement and retest changes to an algorithm. My iterations with MATLAB and Simulink were much faster, and I could usually implement and retest an enhancement in a matter of days, if not on the same day.
In one instance, I noticed that, while the system performed well shortly after system startup, the bit error rate (BER) steadily increased over time. To diagnose the problem, I captured data from the ADC at various time intervals after startup and analyzed it in MATLAB. The constellation plots clearly showed how the performance degraded over time.
我确定与采样率偏移相关的问题，它导致LTE帧的循环前缀区域的逐渐漂移。我实现了一种算法改变以跟踪主同步信号。我通过仿真验证了此修复，然后在电路板上实施，无论系统操作多长时间，我都看到BER保持不足（图4）。
Figure 4. Constellation plots showing degraded performance (top left), board-to-board testing (top right), and over-the-air testing (bottom).
Later, I found an issue with IQ gain and phase imbalance. Although we thought we had calibrated our system well to handle IQ imbalance, I discovered that the calibration parameter values were not correct. Once again, I analyzed captured data in MATLAB and then performed a quick brute-force search in MATLAB to find the appropriate calibration values to correct the problem. I updated the Simulink model to implement the change and generated code to verify the fix on live hardware within minutes.
Planned Enhancements
We are planning a 5G version of our digital baseband and working on extending our RF technology to meet the specification from the O-RAN Alliance for open radio access networks. Providing an O-RAN interface to our designs will make it easier to integrate our IP with other systems even as we continue to improve performance and add new capabilities.
