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Add PWM Driver Block

Step 4 of 7 in Add Hardware Drivers to Simulation Model and Deploy to Target Hardware

In the Simulink®Library Browser, add the ePWM block fromEmbedded Coder®Support Package for Texas Instruments™ C2000™ Processors>F2837xD。

Configure the ePWM1, ePWM2, and ePWM3 blocks for generating the PWM pulse. In the ePWM block parameters dialog box, specify the pulse width modulation (PWM) counter period register value calculated from CPU frequency and PWM frequency. For center-aligned PWM, divide the computed value by2。

PWM counter period=CPU clock frequency/PWM frequency/2

For more details, see the TMS320f28379d processor ePWM peripheral.

In the F2837x/07x/004x/38x ePWM block parameters dialog box, update these settings to configure PWM1 to generate PWM pulses in the target hardware.

EPWM块中的选项卡和参数 Settings

General>Module

 ePWM1

General>Timer Period

Enter the PWM period value in the CPU clock cycle

  • PWM计数器周期= CPU时钟频率 / PWM频率 /2

  • For LaunchPad 28379D, clock frequency is200MHz. For PWM frequency of20kHz,

    PWM counter period =200e6 / 20e3 / 2;

    PWM counter period =5000

Counter Compare>Specify CMPA via

 Input port

Counter Compare>CMPA initial value

 Enter the PWM counter period/2(2500)

Counter Compare>Specify CMPB via

 Input port

Counter Compare>CMPB initial value

 Enter the PWM counter period/2(2500)

死条单元>使用DeadBand进行EPWM1​​A

 上

死条单元>使用deadband进行EPWM1​​B

 上

死条单元>Deadband polarity

 Active high complementary (AHC)

死条单元>Deadband Rising edge (RED) period (0~16383)

 15

死条单元>DeadBand Falling Edge（FED）时期（0〜16383）

 15

事件触发器>Enable ADC start of conversion for module Acheck box (only for PWM1)

 上

事件触发器>Start of conversion for module A event selection（仅适用于PWM1）

 Counter equals to period (CTR=PRD)

Rename the block as ePWM1.

In the F2837x/07x/004x/38x ePWM block parameters dialog box, update the settings to configure PWM2 and PWM3 to generate PWM pulses in the target hardware. PWM2 and PWM3 are synchronized with PWM1. Follow ePWM1 configurations (other than事件触发器) and add these configurations.

EPWM块中的选项卡和参数 Settings

General>Module

 ePWM2

General>Timer Period

Enter the PWM period value in the CPU clock cycle

  • PWM计数器周期= CPU时钟频率 / PWM频率 /2

  • For LaunchPad 28379D, clock frequency is200MHz. For PWM frequency of20kHz,

    PWM counter period =200e6 / 20e3 / 2;

    PWM counter period =5000

General>Synchronization action

 Set counter to phase value specified via dialog

General>Counting direction after phase synchronization

 Count up after sync

General>Phase offset value (TBPHS)

 0

Counter Compare>Specify CMPA via

 Input port

Counter Compare>CMPA initial value

 Enter the PWM counter period/2(2500)

Counter Compare>Specify CMPB via

 Input port

Counter Compare>CMPB initial value

 Enter the PWM counter period/2(2500)

死条单元>使用DeadBand进行EPWM1​​A

 上

死条单元>使用deadband进行EPWM1​​B

 上

死条单元>Deadband polarity

 Active high complementary (AHC)

死条单元>Deadband Rising edge (RED) period (0~16383)

 15

死条单元>DeadBand Falling Edge（FED）时期（0〜16383）

 15

Rename the blocks as ePWM2 and ePWM3.

范围从0toPWM_counter_period。PWM outputs when PWM up-counter matches CMPA and PWM down-counter matches CMPB. By default, the system inputs a duty cycle of 50% by selecting PWM counter period /2。

On the事件触发器tab of PWM1 module, configure the ADC start of conversion event to begin when the PWM counter equals the PWM period.

Synchronize the ePWM2 and ePWM3 blocks with the ePWM1 block by setting the synchronization timing to the moment when the PWM counter equals to zero in the ePWM2 and ePWM3 blocks.

The ePWM blocks expect the duty cycle value to range from0到PWM计数器周期值（5000). The Control_System subsystem outputs the PWM in the range-1to1。该模型需要将输出扩展到0to5000(PWM counter period value).

For simulation, add a variant source/sink to the hardware driver block for simulation and code generation.

将硬件驱动程序添加到仿真模型中，并部署到目标硬件
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