硬件在循环工作流程中

Half Wave Rectifier Model

打开Simscape Half Wave整流器模型。在MATLAB®命令提示符中，输入：

ModelName ='sschdlexHalfWaveRectifierExample';Open_System（modelName）set_param（modelName，'SimulationCommand','更新'）；

open_system([ModelName,'/Simscape_system'）））

The half-wave rectifier consists of a Resistor, which is a linear block, and a Diode, which is a switched linear block. At the input and output port interfaces, the model has Simulink-PS Converter and PS-Simulink Converter blocks. The solver settings are configured for compatibility with Simscape HDL Workflow Advisor. If you open the Block Parameters dialog box for the Solver Configuration block,Use local solver被选中Backward Euleris specified as the求解器类型。看开始使用SIMSCAPE硬件在循环工作流程。

要查看算法功能，请模拟模型。

SIM（modelName）open_system（[ModelName，'/范围'）））

2. Configure the Simscape Model for HDL compatibility by using thehdlsetup功能：

hdlsetup('sschdlexHalfWaveRectifierExample')

生成HDL实现模型

生成HDL实现模型：

1.打开SIMSCAPE HDL工作流顾问：

sschdladvisor('sschdlexHalfWaveRectifierExample')

2. To compare functionality of the HDL implementation model with the original Simscape algorithm, select theGenerate implementation modelstep, and then select the为实现模型生成验证逻辑check box. Use a验证逻辑公差of0.001。Right-click theGenerate implementation model步骤和选择运行到选定的任务。

顾问生成HDL实现模型和州空间验证模型。要将HDL实现模型的功能与原始SIMSCAPE算法进行比较，请打开和模拟状态空间验证模型。该模型的输出匹配原始SIMSCAPE模型。有关更系统的验证，请参阅验证HDL实现模型模拟人生cape Algorithm。

看alsoSimscape HDL Workflow Advisor Tasks。

Setup and Configuration

Speedgoat IO334-325K FPGA模块使用Xilinx®Vivado®和IP Core Generation工作流基础架构。在Speedgoat I/O模块上部署HDL实现模型之前：

1.安装Xilinx Vivado和设置工具路径

安装最新版本的Xilinx®Vivado®，如图HDL语言支持和支持的第三金宝app方工具和硬件。Then, set the tool path to the installed Xilinx Vivado executable by using theHDLSETUPTOUPTOLPATHfunction.

HDLSETUPTOUPTOLPATH（'toolname','Xilinx Vivado',“工具路”,'c：\ xilinx \ vivado \ 2020.1 \ bin \ vivado.bat')

2.Install Speedgoat I/O Blockset and Speedgoat - HDL Coder Integration Packages

安装Speedgoat I/O模块和Speedgoat -HDL编码器集成软件包。看Install Speedgoat HCIP。

3.设置I/O模块

For real-time simulation, set up the I/O module. SeeXilinx HDL Software for Speedgoat I/O Modules。

HDL Workflow Advisor

The HDL Workflow Advisor guides you through HDL code generation and the FPGA design process. Use the Advisor to:

To open the HDL Workflow Advisor, use theHDLADVISORfunction.

HDLADVISOR('gmStateSpaceHDL_sschdlexHalfWaveRectifierEx/Simscape_system/HDL Subsystem')

The left pane contains folders that represent a group of related tasks. Expanding the folders and selecting a task displays information about that task in the right pane. The right pane can contain simple controls for running the task to advanced parameters and option settings that control code and test bench generation. To learn more about each task, right-click that task, and select这是什么？。看Getting Started with the HDL Workflow Advisor。

Generate FPGA Bitstream for Speedgoat Target Computer

1. Open the HDL implementation model, and then open the HDL Workflow Advisor for the implementation model.

open_system('gmStateSpaceHDL_sschdlexHalfWaveRectifierEx') hdladvisor('gmStateSpaceHDL_sschdlexHalfWaveRectifierEx/HDL Subsystem')

2. inSet Target Device and Synthesis Tooltask, specify目标工作流程asSimulink Real-Time FPGA I/Oand目标平台asSpeedgoat IO334-325K。

3. In theSet Target Reference Designtask, select a value ofx4对于参数PCIe lanes, and selectRun This Task。

4. InSet Target Interface任务，映射输入和输出singledata type ports toPCIe Interfaceand selectRun This Task。

5. In the设置目标频率task, set the目标频率（MHz）as100。

6. Right-click the生成Simulin金宝appk实时界面task and select运行到选定的任务要生成HDL IP核心，FPGA Bitstream，然后将Bitstream下载到Speedgoat Target计算机中的IO334 I/O模块中。

生成金宝app了Simulink实时接口模型，称为gm_gmStateSpaceHDL_sschdlexHalfWaveRectifierEx_slrt。

For rapid prototyping, you can export the Workflow Advisor settings to a script. The script is a MATLAB file that you run from the command line. You can modify and run the script, or import the settings into the HDL Workflow Advisor User Interface. To save the workflow, in the HDL Workflow Advisor User Interface, selectFile > Export to Script。Save the file ashdlworkflow_slrt_io334.m。

要导入此文件，在HDL Workflow Advisor用户界面中，选择File > Import from Script。In the Import Workflow Configuration dialog box, select thehdlworkflow_slrt_io334.m文件。HDL Workflow Advisor根据导入的脚本更新任务。看Run HDL Workflow with a Script。

Deploy Bitstream to Speedgoat IO334-325k Target

1.将开发计算机连接到目标

使用交叉网络电缆将开发计算机连接到目标。Speedgoat目标计算机的默认IP地址为192.168.7.5。将开发计算机和目标计算机之间的通信链接的IP地址设置为一个值192.168.7.2because the communication link must be in the same network.

2.设置并配置Simulink实时资源管理器金宝app

You download the bitstream by using the Simulink Real-Time Explorer. To open the Simulink Real-Time Explorer, enter the commandslrtExplorer。或者，您可以从Real-TimeSimulink工具条金宝app的选项卡。

slrtExplorer

The Simulink Editor displays theReal-Timetab for models that are configured for theslrealtime.tlc代码生成目标。

一个。在Si金宝appmulink实时资源管理器中，在“目标配置”选项卡上，在开发计算机上配置设置：

b。如果更改开发计算机上的设置，请单击更改IP地址button to apply corresponding changes on the target computer.

3.创建实时应用程序

打开Simulin金宝appk实时接口模型。在模型中添加一个示波器块，并将其连接到输出。记录输出信号以查看模拟数据检查器上的仿真结果。

4.构建和运行实时应用程序

点击Run on Targetbutton on theReal-Time选项卡以编译并下载模型到Speedgoat IO334-325K目标。

Observe the output simulation results on the Simulation Data Inspector. The simulation results of the downloaded model match the original Simscape model simulation.