You can use the hardware-software co-design workflow to partition your design to run on SoC platforms. With the HDL Workflow Advisor, you can use theIP Core Generation
workflow to generate an HDL IP core that runs on the FPGA on board the SoC. Using Embedded Coder®, you can generate and build the embedded software, and run it on the ARM®processor.
Hardware-Software Co-Design Workflow for SoC Platforms
High-level workflow steps for targeting an SoC platform.
Getting Started with the HDL Workflow Advisor
Learn the basics of the HDL Workflow Advisor and how to run various tasks.
Run HDL Workflow with a Script
Export, import, or configure an HDL Workflow CLI command script.