Hardware Support

Xilinx RFSoC Support from HDL Coder

Generate code for the FPGA portion of RFSoC devices

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    Capabilities and Features

    HDL Coder™ Support Package for Xilinx®Zynq®UltraScale+™ RFSoC devices enables generation of IP cores that can integrate into RFSoC devices using Xilinx Vivado®Design Suite.

    This support package includes reference designs for popular RFSoC development kits, so you can generate HDL code and port mappings to I/O and AXI registers to interface with RF tiles and DDR memory, and interactively control the FPGA design from MATLAB®.

    You can useSoC Blockset™for system-level modeling of RFSoC devices, configuration of customRFSoC-based boards, and deployment of complete SoC applications, including executables for ARM®Cortex-A53 processors.

    Xilinx Zynq Ultrascale+ RFSOC ZCU111评估套件

    Supported Hardware

    设备系列

    		 Board

    Xilinx Zynq UltraScale+ RFSoC Gen 1

    Xilinx Zynq Ultrascale+ RFSOC ZCU111评估套件

    Xilinx Zynq UltraScale+ RFSoC Gen 3

    		 Xilinx Zynq UltraScale+ RFSoC ZCU216 Evaluation Kit

    You can also specify custom RFSoC targets.

    Platform and Release Support

    See thehardware support package system requirements tablefor current and prior version, release, and platform availability.

    Related Resources

    必需的产品和硬件下载188bet金宝搏

    See table underSupported Hardware.

    All required third-party software is installed by the Support Package Installer.

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