Reference another model to create model hierarchy - Simulink - MathWorks Deutschland

Library:
Simulink / Ports & Subsystems
HDL Coder / Ports & Subsystems

Ports

Input

`Port_1`— Input that corresponds to root-level blocks of referenced model
signal | message | function call

TheModelblock has an input port for each input port of the model it references. The input ports of referenced models are defined byInportandIn Bus Elementblocks. The name of theModelblock port matches the name of the corresponding port in the referenced model. The input signal for eachModelblock port must be valid for the corresponding port in the referenced model. For more information, seeModel Reference Interface and Boundary.

Function calls connected to an input port pass into the referenced model. To conditionally execute the referenced model based on a function call, seeFunction Call.

Output

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`Port_1`— Output that corresponds to root-level blocks of referenced model
signal | message

TheModelblock has an output port for each output port of the model it references. The output ports of referenced models are defined byOutportandOut Bus Elementblocks. The name of the port on theModelblock matches the name of the corresponding port in the referenced model. The output signals of theModelblock are the signals connected to theOutportandOut Bus Elementblocks in the referenced model. SeeModel Reference Interface and Boundary.

Control

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Conditional Execution

`Enable`— Control signal that enables referenced model
scalar | vector | matrix

The enable port appears at the top of theModelblock. The port label is an icon that represents an enable signal.

Enable port on Model block

The control signal that connects to the port determines when to execute the referenced model. For more information, seeConditionally Execute Referenced Models.

Dependencies

To enable this port, add anEnable块顶级的参考模型。

`Trigger`— Control signal that triggers referenced model
scalar | vector | matrix

The trigger port appears at the top of theModelblock. The port label is an icon that represents a trigger signal.

Trigger port on Model block

The control signal that connects to the port determines when to execute the referenced model. For more information, seeConditionally Execute Referenced Models.

Dependencies

To enable this port, add aTriggerblock to the top level of the referenced model and set itsTrigger typetorising,falling, oreither.

`Function Call`— Control signal for function-call event
function call

The function-call port appears at the top of theModelblock. The port label displays the name of the referenced model as a function.

Function-call port on Model block

The control signal that connects to the port determines when to execute the referenced model. For more information, seeConditionally Execute Referenced Models.

Dependencies

To enable this port, add aTriggerblock to the top level of the referenced model and set itsTrigger typetofunction-call.

Model Events Simulation

`initialize`— Control signal for model initialize event
function call

The initialize event port provides a control signal that triggers a model initialize event, which initializes the states of the referenced model.

The referenced model can contain anInitialize Functionblock that corresponds to the model initialize event. For more information, see使用初始化、复位和终止功能.

Dependencies

To enable this port, selectShow model initialize port.

`reset`— Control signal for model reset event
function call

A reset event port provides a control signal that triggers a model reset event, which resets the states of the referenced model.

必须包含一个引用的模型Reset Functionblock that corresponds to each model reset event. For more information, see使用初始化、复位和终止功能.

To specify the port name, use theEvent nameparameter of theEvent Listenerblock in theReset Functionblock.

Dependencies

To enable this type of port, selectShow model reset ports.

`terminate`— Control signal for model terminate event
function call

The terminate event port provides a control signal that triggers a model terminate event, which reads and saves the states of the referenced model.

The referenced model can contain aTerminate Functionblock that corresponds to the model terminate event. For more information, see使用初始化、复位和终止功能.

Dependencies

To enable this port, selectShow model terminate port.

`D[???]`— Control signal for scheduling periodic events
function call

Periodic event ports provide control signals that specify when to execute the model. For an example, seeTest Rate-Based Model Simulation Using Function-Call Generators.

Each port label displays information about the periodic event, such as the sample time of the correspondingInportblock. For example, theModelblock in this image displays periodic event ports and references a model with two discrete rates: 0.01 and 0.1.

A Model block has ports labeled D1[0.01] and D2[0.1].

Dependencies

To enable this type of port, setSchedule rates withtoPorts.

Parameters

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To interactively modifyModelblock parameters, select theModelblock. Then, in the Simulink Toolstrip, on theModel Blocktab, clickBlock Parameters.

Main

Specify fundamental information for theModelblock.

`Model name`— File name of referenced model
`”`（default) | character vector

Specify the file name of the referenced model. The file name must be a valid MATLAB^®identifier for a model, as defined inModel Names. The file extension is optional.

To select the model that you want to reference, clickBrowse. To view the specified model, clickOpen Model.

Programmatic Use

You can query the name of the referenced model in different formats:

ModelFile— Model name with file extension. When you do not specify a file extension, the first match that Simulink finds on the MATLAB path determines the file extension.
ModelNameDialog— Model name with or without file extension, depending on whether you specify a file extension.
ModelName— Model name without file extension. If you specify a model name with a file extension forModelName, Simulink retains the file extension by settingModelNameDialogandModelFile.

Parameter:ModelNameDialog

Type: character vector

Value:”|''

Default:”

`Simulation mode`— Simulation mode for model reference
`Normal`（default) |`Accelerator`|`Software-in-the-loop (SIL)`|`Processor-in-the-loop (PIL)`

Specify the simulation mode for theModelblock. The simulation mode for theModelblock can be different than the simulation mode of its referenced model and of other models in the model hierarchy.

Accelerator— Create a MEX file for the referenced model and then execute the referenced model by running the S-function.
Normal— Execute the referenced model interpretively, as if the referenced model is an atomic subsystem implemented directly within the parent model.
Software-in-the-loop (SIL)— This option requires an Embedded Coder^®license. Generate production code based on theCode interfaceparameter setting. The code is compiled for and executed on the host platform.
Processor-in-the-loop (PIL)— This option requires an Embedded Coder license. Generate production code based on theCode Interfaceparameter setting. This code is compiled for and executed on the target platform. A target connectivity API implementation supports the exchange of data between the host and target at each time step during the PIL simulation.

The corners of theModelblock indicate the simulation mode of theModelblock. For normal mode, the corners have empty triangles. For accelerator mode, the corner triangles are filled in. For SIL and PIL modes, the corners are filled in and the word（SIL)or（PIL)appears on the block icon.

Although you can specify any simulation mode for a model, when you reference that model, theModelblock specifies the simulation mode of the referenced model instance. The simulation mode of a parent model can override the simulation mode of aModelblock.

For more information, seeChoose Simulation Modes for Model Hierarchies.

Programmatic Use

Parameter:SimulationMode

Type: character vector

Value:'Normal'|'Accelerator'|'Software-in-the-loop'|'Processor-in-the-loop'

Default:'Normal'

`Code interface`— Option to generate code from top model or referenced model
`Model reference`（default) |`Top model`

Specify whether to generate the code from the top model or the referenced model for SIL and PIL simulation modes. To deploy the generated code as part of a larger application that uses the referenced model, specifyModel reference. To deploy the generated code as a standalone application, specifyTop model.

Model reference— The code is generated from the referenced model as part of a model hierarchy. Code generation uses theslbuild('model', 'ModelReferenceCoderTarget')command.
Top model— The code is generated from the top model with the standalone code interface. Code generation uses theslbuild('model')command.

Dependencies

To enable this parameter, setSimulation modeto eitherSoftware-in-the-loop (SIL)orProcessor-in-the-loop (PIL).

Programmatic Use

Parameter:CodeInterface

Type:character vector

Value:'Model reference'|'Top model'

Default:'Model reference'

Model Events Simulation

Control when the referenced model executes and changes states.

`Show model initialize port`— Option to display initialize event port
off (default) | on

Select this parameter to display the initialize event port. Clear this parameter to remove the port.

Dependencies

To enable this parameter, reference a model that is not configured for conditional execution.

Programmatic Use

Block parameter:ShowModelInitializePort

Type:character vector

Value:'off'|'on'

Default:'off'

`Show model reset ports`— Option to display reset event ports
off (default) | on

Select this parameter to display the reset event ports. Clear this parameter to remove the ports.

Dependencies

To enable this parameter, reference a model that is not configured for conditional execution and contains aReset Functionblock.

Programmatic Use

Block parameter:ShowModelResetPorts

Type:character vector

Value:'off'|'on'

Default:'off'

`Show model terminate port`— Option to display terminate event port
off (default) | on

Select this parameter to display the terminate event port. Clear this parameter to remove the port.

Dependencies

To enable this parameter, reference a model that is not configured for conditional execution. Then, selectShow model initialize port.

Programmatic Use

Block parameter:ShowModelTerminatePort

Type:character vector

Value:'off'|'on'

Default:'off'

`Schedule rates`— Option to schedule periodic events
off (default) | on

Control the execution of the referenced model with periodic events.

Depending on the value of theSchedule rates withparameter, selecting this parameter will either display the periodic event ports on theModelblock or create partitions to use with theSchedule Editor. When theSchedule rates withparameter is not visible, its default value (Ports) applies.

Clearing this parameter hides the periodic event ports and does not create partitions.

Dependencies

To enable this parameter, reference a model with discrete sample times that is not configured for conditional execution and is not an export-function model. When the parent model is rate based and the referenced model is an export-function model,Schedule ratesis automatically selected.

Programmatic Use

Block parameter:ScheduleRates

Type:character vector

Value:'off'|'on'

Default:'off'

`Schedule rates with`— Option to create partitions or periodic event ports
`Ports`（default) |`Schedule Editor`

Create ports or partitions.

Ports— Display periodic event ports for discrete rates in the referenced model.
To manually specify port rates, use theset_paramfunction to set theAutoFillPortDiscreteRatesparameter of theModelblock to'off'. Then, specify the port rates with thePortDiscreteRatesparameter.
Schedule Editor— Create partitions for the referenced model to use with theSchedule Editor.

Dependencies

To enable this parameter:

The parent model must not be an export-function model.
The parent model must not use a fixed-step solver and single-tasking mode.
SelectSchedule rates. When the parent model is rate based and the referenced model is an export-function model,Schedule ratesis automatically selected.
ClearShow model initialize portandShow model reset ports.

Programmatic Use

Block parameter:ScheduleRatesWith

Type:character vector

Value:'Ports'|'ScheduleEditor'

Default:'Ports'

Instance Parameters

Specify instance-specific values for model arguments.

`Instance parameters`— Display instance parameters and specify values for referenced model
number | workspace variable | mathematical expression | structure or structure field

Display instance parameters and specify instance-specific values.Instance parameters块参数的配置the referenced model to use a different value for each instance of the model.

To specify instance-specific values, use theValuecolumn in the table. To specify that a parameter value can be overridden by the parent model, select theArgumentcheck box. For more information about configuring instance parameters in a referenced model and specifying instance-specific values at theModelblock, seeParameterize Instances of a Reusable Referenced Model.

When changing instance-specific values, you can use a partial structure that has fields that correspond to only the instance parameters whose values you want to change. Instance parameters not included in the partial structure retain their values. In the structure, include the instance parameter names and values, specified as character vectors.

Programmatic Use

Block parameter:ParameterArgumentValues

Type:structure

Value:structure

Default:structure with no fields

Block parameter:InstanceParameters

Type:structure array

Value:structure with fields:Name,Value,Path, andArgument.

Model Examples

Component-Based Modeling with Model Reference

Walks you through simulation and code generation of a model that references another model multiple times. In this example, Simulink® generates code for accelerated simulation, and Simulink® Coder™ generates code that can be deployed in standalone applications.

Open Model

Convert Subsystem to Referenced Model

Demonstrates how to convert a subsystem to a referenced model by using theModel Reference Conversion Advisortool or theSimulink.SubSystem.convertToModelReferencefunction.

Open Model

Reuse Model Components from Files

Save components in separate subsystem and model files.

Model Reference Variants

Use model reference variants. A Model block is used to reference one Simulink® model from another Simulink model. A Variant Subsystem block can contain Model blocks as variants. A variant describes one of N possible modes in which a Variant Subsystem block can operate. Each variant references a specific model with its associated model-specific arguments. For a given Variant Subsystem block, only one variant is active during simulation. You can switch the active variant by changing the values of variables in the base workspace or by manually overriding variant selection using the Variant Subsystem block dialog box.

Open Live Script

Block Characteristics

Data Types	`Boolean^[a]`\|`bus^[a]`\|`double^[a]`\|`enumerated^[a]`\|`fixed point^[a]`\|`half^[a]`\|`integer^[a]`\|`single^[a]`\|`string^[a]`
Direct Feedthrough	`no`
Multidimensional Signals	`limited^[a]`
Variable-Size Signals	`limited^[a]`
Zero-Crossing Detection	`no`
^[a]Actual data type or capability support depends on block implementation.

Tips

To programmatically determine whether aModelblock references a protected model, use theget_paramfunction to query the read-onlyProtectedModelparameter of theModelblock. If the referenced model is protected, the function returns'on'. If the referenced model is unprotected, the function returns'off'.

Compatibility Considerations

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Specifying variant models inModelblocks is no longer supported

Warns starting in R2019a

Starting in R2019a, specifying variant models inModelblocks is no longer supported. TheModel Variantsblock, which was aModelblock preconfigured to specify variant models, is also no longer supported. Loading a model that contains these blocks converts them toVariant Subsystemblocks that containModelblocks that represent the variant choices.

Variant Subsystemblocks provide these advantages:

You can mixModelblocks andSubsystemblocks as variant choices.
You can specify variants that have different numbers of input and output ports.

TheVariant Subsystemblock parameterAnalyze all choices during update diagram and generate preprocessor conditionalsbehaves differently from theModelblock parameterGenerate preprocessor conditionals. Instead of causing simulation and update diagram to compile the active variant only, theVariant Subsystemblock parameter compiles all variants.

If you have scripts that useModelblock parameters for variants, you must update them to useVariant Subsystemblock parameters.

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

Actual code generation support depends on block implementation.

HDL Code Generation
Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.

HDL Coder™ provides additional configuration options that affect HDL implementation and synthesized logic. For more information about using theModelblock for HDL code generation and best practices and limitations, seeModel Referencing for HDL Code Generation（HDL Coder).

HDL Architecture

Architecture Description

ModelReference（default) When you want to generate code from a referenced model and any nested models, use theModelReferenceimplementation. For more information, seeHow To Generate Code for a Referenced Model（HDL Coder).

Architecture	Description
`ModelReference`（default)	When you want to generate code from a referenced model and any nested models, use the`ModelReference`implementation. For more information, seeHow To Generate Code for a Referenced Model（HDL Coder).
`BlackBox`	Use the`BlackBox`implementation to instantiate an HDL wrapper, or black box interface, for legacy or external HDL code. If you specify a black box interface, HDL Coder does not attempt to generate HDL code for the referenced model. For more information, seeGenerate Black Box Interface for Referenced Model（HDL Coder).

BlackBox

Use theBlackBoximplementation to instantiate an HDL wrapper, or black box interface, for legacy or external HDL code. If you specify a black box interface, HDL Coder does not attempt to generate HDL code for the referenced model.

For more information, seeGenerate Black Box Interface for Referenced Model（HDL Coder).

Black Box Interface Customization

For theBlackBoxarchitecture, you can customize port names and set attributes of the external component interface. SeeCustomize Black Box or HDL Cosimulation Interface（HDL Coder).

HDL Block Properties

BalanceDelays	Detects introduction of new delays along one path and inserts matching delays on the other paths. The default is`inherit`. See alsoBalanceDelays（HDL Coder).
ConstrainedOutputPipeline	Number of registers to place at the outputs by moving existing delays within your design. Distributed pipelining does not redistribute these registers. The default is`0`. For more details, seeConstrainedOutputPipeline（HDL Coder).
DistributedPipelining	Pipeline register distribution, or register retiming. The default is`off`. See alsoDistributedPipelining（HDL Coder).
DSPStyle	Synthesis attributes for multiplier mapping. The default is`none`. See alsoDSPStyle（HDL Coder).
InputPipeline	Number of input pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is`0`. For more details, seeInputPipeline（HDL Coder).
OutputPipeline	Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is`0`. For more details, seeOutputPipeline（HDL Coder).
ReferenceModelPrefix	Prefix of the referenced model to insert in the generated code. The code generator applies this prefix to submodel file names and HDL identifiers. The default prefix is`modelname_`where`modelname`is the name of the referenced model. Note If you specify an empty prefix, the code generator does not add a prefix to submodel file names. This can cause HDL compilation errors due to naming collisions between the models. If you use the referenced model as the DUT, the code generator ignores the prefix that you specify.
SharingFactor	Number of functionally equivalent resources to map to a single shared resource. The default is 0. See alsoResource Sharing（HDL Coder).
StreamingFactor	Number of parallel data paths, or vectors, that are time multiplexed to transform into serial, scalar data paths. The default is 0, which implements fully parallel data paths. See alsoStreaming（HDL Coder).

Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.

Actual data type support depends on block implementation.

Model

Description

Ports

Input

Port_1— Input that corresponds to root-level blocks of referenced modelsignal | message | function call

Output

Port_1— Output that corresponds to root-level blocks of referenced modelsignal | message

Control

Enable— Control signal that enables referenced modelscalar | vector | matrix

Dependencies

Trigger— Control signal that triggers referenced modelscalar | vector | matrix

Dependencies

Function Call— Control signal for function-call eventfunction call

Dependencies

initialize— Control signal for model initialize eventfunction call

Dependencies

reset— Control signal for model reset eventfunction call

Dependencies

terminate— Control signal for model terminate eventfunction call

Dependencies

D[???]— Control signal for scheduling periodic eventsfunction call

Dependencies

Parameters

Main

Model name— File name of referenced model”（default) | character vector

Programmatic Use

Simulation mode— Simulation mode for model referenceNormal（default) |Accelerator|Software-in-the-loop (SIL)|Processor-in-the-loop (PIL)

Programmatic Use

Code interface— Option to generate code from top model or referenced modelModel reference（default) |Top model

Dependencies

Programmatic Use

Model Events Simulation

Show model initialize port— Option to display initialize event portoff (default) | on

Dependencies

Programmatic Use

Show model reset ports— Option to display reset event portsoff (default) | on

Dependencies

Programmatic Use

Show model terminate port— Option to display terminate event portoff (default) | on

Dependencies

Programmatic Use

Schedule rates— Option to schedule periodic eventsoff (default) | on

Dependencies

Programmatic Use

Schedule rates with— Option to create partitions or periodic event portsPorts（default) |Schedule Editor

Dependencies

Programmatic Use

Instance Parameters

Instance parameters— Display instance parameters and specify values for referenced modelnumber | workspace variable | mathematical expression | structure or structure field

Programmatic Use

Model Examples

Component-Based Modeling with Model Reference

Convert Subsystem to Referenced Model

Reuse Model Components from Files

Model Reference Variants

Block Characteristics

Tips

Compatibility Considerations

Specifying variant models inModelblocks is no longer supported

Extended Capabilities

C/C++ Code GenerationGenerate C and C++ code using Simulink® Coder™.

HDL Code GenerationGenerate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.

Fixed-Point ConversionDesign and simulate fixed-point systems using Fixed-Point Designer™.

See Also

Topics

Simulink Documentation

金宝app

Model-Based Design for Embedded Control Systems

`Port_1`— Input that corresponds to root-level blocks of referenced model
signal | message | function call

`Port_1`— Output that corresponds to root-level blocks of referenced model
signal | message

`Enable`— Control signal that enables referenced model
scalar | vector | matrix

`Trigger`— Control signal that triggers referenced model
scalar | vector | matrix

`Function Call`— Control signal for function-call event
function call

`initialize`— Control signal for model initialize event
function call

`reset`— Control signal for model reset event
function call

`terminate`— Control signal for model terminate event
function call

`D[???]`— Control signal for scheduling periodic events
function call

`Model name`— File name of referenced model
`”`（default) | character vector

`Simulation mode`— Simulation mode for model reference
`Normal`（default) |`Accelerator`|`Software-in-the-loop (SIL)`|`Processor-in-the-loop (PIL)`

`Code interface`— Option to generate code from top model or referenced model
`Model reference`（default) |`Top model`

`Show model initialize port`— Option to display initialize event port
off (default) | on

`Show model reset ports`— Option to display reset event ports
off (default) | on

`Show model terminate port`— Option to display terminate event port
off (default) | on

`Schedule rates`— Option to schedule periodic events
off (default) | on

`Schedule rates with`— Option to create partitions or periodic event ports
`Ports`（default) |`Schedule Editor`

`Instance parameters`— Display instance parameters and specify values for referenced model
number | workspace variable | mathematical expression | structure or structure field

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

HDL Code Generation
Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.

Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.