Documentation

Deployment

Create bitstream containing user programming and download it to Intel®SoC platform

HDL Coder™ can generate an IP core, integrate it into your Qsys project, and program the Intel hardware. Using Embedded Coder®, you can generate and build the embedded software, and run it on the ARM®processor.

Topics

Default System Reference Design

设计一个学习系统默认引用d using the reference design.

Default System with External DDR4 Memory Access Reference Design

Learn about the default system with external DDR3 memory access reference design and its requirements.

Simulink Hardware-Software Co-Design for Intel SoC Platform

Hardware-software co-design workflow example for Intel SoC Platform

Related Information

Intel SoC Devices(HDL Coder)

Featured Examples

Performing Large Matrix Operation on FPGA using External Memory

Performing Large Matrix Operation on FPGA using External Memory

This example shows how to:
Open Script
HDL Coder Support Package for Intel SoC Devices Documentation
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