Documentation

Hardware-Software Co-Design Basics

Learn about the hardware-software co-design workflow and how to use the Workflow Advisor to run the algorithm on an FPGA board.

You can use the hardware-software co-design workflow to partition your design into parts that run on parts that run on hardware and software. The workflow does not require targeting the software part of your design because the FPGA boards do not have an embedded processor. For the standalone FPGA board, use the HDL Workflow Advisor to generate a HDL IP core from the part of your design that runs on the hardware.

Topics

IP Core Generation Workflow for Xilinx FPGA Boards

Learn how to use the IP Core Generation workflow with standalone FPGA devices and embed the IP core into the reference design.

Getting Started with the HDL Workflow Advisor(HDL Coder)

Learn the basics of the HDL Workflow Advisor and how to run various tasks.

Run HDL Workflow with a Script(HDL Coder)

Export, import, or configure an HDL Workflow CLI command script

Featured Examples

IP Core Generation of an I2C Controller IP to Configure the Audio Codec Chip

IP Core Generation of an I2C Controller IP to Configure the Audio Codec Chip

Illustrates how to model an I2C controller using an I2C Master controller modeled using Stateflow™ blocks for configuring the audio codec chip.

Open Script

Getting Started with the HDL Workflow Command-Line Interface

Getting Started with the HDL Workflow Command-Line Interface

Use the HDL Workflow Advisor to run HDL workflows from the command-line and the 'Export to script' functionality.

Open Script

HDL Coder Support Package for Xilinx FPGA Boards Documentation

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