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小组信号线进入虚拟巴士

You can combine signals into a bus and then access the bus as a whole or select specific signals from the bus. A virtual Simulink^®bus is analogous to a bundle of wires held together by tie wraps. For comparison, a nonvirtual Simulink bus is analogous to a struct in C code.

Not all blocks can accept buses and some blocks implicitly convert buses to vectors. To learn which blocks support which types of buses, see具有公共汽车的块。To identify bus conversions, seeManage Bus-to-Vector Conversions。

您如何根据要分组的信号的位置来创建虚拟总线会有所不同。

要专注于基本步骤，这些示例很简单，但是，当您有许多信号合并时，公共汽车最有用。

Tip

当您打开模型或创建总线时，Simulink编辑器将不会显示总线线样式。金宝app要更新行样式，您必须编译模型。在ModelingSimulink工具条金宝app的选项卡，单击更新模型或者Run。

组件中的组信号线

开放型号

您可以使用总线创建器块将信号分组到组件中的虚拟总线中。

Open the example model, which contains three blocks.

要创建一个包含来自多个块的输出的总线，请拖动以选择块。对于此示例，选择CHIRP信号和正弦波块。在出现的动作栏中，单击Create Bus。

Simulink adds a Bus Creator block and connects the inputs to that block. The output of the Bus Creator block is a virtual bus.

To make identifying the elements of the bus easier, label the inputs to the Bus Creator block. Label the output of the Chirp Signal block by double-clicking the line and enteringChirp。同样，标记正弦波块的输出Sine。

To create a second bus that contains the first bus and the output of the Step block, drag to select the Bus Creator and Step blocks. In the action bar that appears, clickCreate Bus。自从Sine和Chirpsignals are elements of the input bus, Simulink creates the same bus regardless of whether your selection includes the Sine Wave and Chirp Signal blocks.

Simulink adds another Bus Creator block and connects the inputs to that block. The output of the Bus Creator block is a virtual bus that contains a nested bus.

You can nest buses to any depth. If one of the inputs to a Bus Creator block is a bus, then its output is a bus hierarchy that contains at least one nested bus.

标记步骤块的输出Step和the output of the first Bus Creator blockNestedBus。可选地安排块以提高模型的可读性。

Connect the output of the second Bus Creator block to a Scope block and label the outputTopBus。To visually identify the buses, compile the model by clicking更新模型或者Run在ModelingSimulink工具条金宝app的选项卡。编译模型更新线样式。

将多个输出信号连接到端口

开放型号

此示例显示了如何使用BUS元素块将子系统或模型的输出信号分组为虚拟总线。

Open the example model, which contains three source blocks.

在模型中添加一个外出总线元件块。一个外部总线元件块类似于连接到出口块的总线创建器块。将CHIRP信号块的输出连接到OUT总线元件块。

OUT总线元件块旁边的标签有两个部分。标签的第一部分描述了公共汽车（OutBus), and the second part of the label describes the bus element (signal1）。为了使识别公共汽车的元素更容易，请双击将元素重命名signal1和enteringChirp。

Ctrl+drag the Out Bus Element block twice to make two copies of the block. When copying the block this way, specify whether to create a new port or use the existing port. To create one output bus that contains all of the signals, chooseUse Existing Port每次复制块时，然后连接信号。

To create hierarchy in the output bus, use dots in the part of the label that describes the bus element. Each dot creates a new level of hierarchy. Create a nested bus namedNestedBusby defining the bus elements asNestedBus.Sine和NestedBus.Step, respectively.

另外，您可以将总线连接到外出总线元件块。如果其他OUT BUS元件块与同一端口相对应，则总线将嵌套在输出总线中。描述总线元素的标签的一部分提供了此嵌套总线的名称。

Inspect the bus hierarchy in the dialog box for the port by double-clicking any of the Out Bus Element blocks.

在模型的输出端口，三个外出总线元件块创建一个虚拟总线。要查看虚拟总线，请在另一个模型中引用该模型或将OUT BUS元素块移入子系统。编译模型时，线样式更新。为了编译模型，ModelingSimulink工具条金宝app的选项卡，单击更新模型或者Run。

将多个子系统端口组合到一个端口

开放型号

该示例通过将多个端口及其连接的信号转换为一个端口和总线来简化子系统接口的三种方法。模型接口不支持此自动转换。金宝app

打开示例模型，其中包含两个具有多个输入和输出端口的子系统。

在两个子系统之间的信号线周围拖动一个选择框。从出现的动作栏中，单击Create Bus。

Simulink replaces the Inport and Outport blocks in the source and destination subsystems with In Bus Element and Out Bus Element blocks.

Drag a selection box around the signal lines between the source blocks and first subsystem. From the action bar that appears, clickCreate Bus。

Simulink adds a Bus Creator block before the first subsystem and replaces the Inport blocks in the first subsystem with In Bus Element blocks.

Drag a selection box around the signal lines between the second subsystem and Scope blocks. From the action bar that appears, clickCreate Bus。

金宝appSimulink用OUT BUS元素块替换了第二个子系统中的外口块，并在第二个子系统之后添加了一个总线选择器块。

最终的模型在子系统接口处使用虚拟总线。