Getting Started withHDL Verifier
Tutorials
HDL Cosimulation
Verify HDL Module with MATLAB Test Bench
Set up and run a ModelSim®and MATLAB®test bench session.
Verify HDL Module with Simulink Test Bench
The steps for setting up an HDL Verifier™ session that uses Simulink®to verify a simple VHDL®model.
HDL Code Import
Cosimulation Wizard for MATLAB System Object
This example guides you through the basic steps for setting up an HDL Verifier™ application using the Cosimulation Wizard.
Verify Raised Cosine Filter Design Using Simulink
Provides instruction in using the Cosimulation Wizard to create a Simulink model for cosimulation
TLM Component Generation
Getting Started with TLM Generator
This example shows how to configure a Simulink® model to generate a SystemC™/TLM component using the tlmgenerator target for either Simulink Coder or Embedded Coder™.
FPGA-in-the-Loop (FIL)
Verify HDL Implementation of PID Controller Using FPGA-in-the-Loop
This example shows you how to set up an FPGA-in-the-Loop (FIL) application using HDL Verifier™.
Verify Digital Up-Converter Using FPGA-in-the-Loop
This example shows you how to verify a digital up-converter design generated with Filter Design HDL Coder™ using FPGA-in-the-Loop simulation.
Verify Generated HDL Code with HDL Workflow Advisor (requiresHDL Coderlicense)
Choose a Test Bench for Generated HDL Code(HDL Coder)
Select between generated test bench options.
Generate Test Bench and Enable Code Coverage Using the HDL Workflow Advisor(HDL Coder)
How to generate test bench and code coverage for your HDL code using the HDL Workflow Advisor