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Processor-in-the-Loop Simulation

Test generated code on target processor or simulator

A processor-in-the-loop (PIL) simulation cross-compiles generated source code, and then downloads and runs object code on your target hardware. By comparing normal and PIL simulation results, you can test the numerical equivalence of your model and the generated code. During a PIL simulation, you can collect code coverage and execution-time metrics for the generated code.

A PIL simulation requires a connectivity configuration.

Classes

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target.AddOn Describe add-on properties for target type
target.API Describe API details
target.APIImplementation Describe API implementation details
target.Board Provide hardware board details
target.BuildDependencies Describe C and C++ build dependencies to associate with target hardware
target.CommunicationChannel Describe communication channel properties
target.CommunicationInterface Describe data I/O details for target hardware
target.CommunicationProtocolStack Describe communication protocol parameters
target.Connection Base class for target connection properties
target.ConnectionProperties Describe target-specific connection properties
target.MainFunction Provide C and C++ dependencies formainfunction of target hardware application
target.PILProtocol Describe PIL protocol implementation for target hardware
target.Port Describe connection via target hardware port
target.PortConnection Describe target connection port
target.Processor Provide target processor information
target.RS232Channel Describe serial communication channel
target.TargetConnection Provide details about connectingMATLABcomputer to target hardware
target.TCPChannel Describe TCP communication properties
target.Tools Describe properties of tools for target hardware
target.UDPChannel Describe UDP communication
target.ApplicationStatus Describe status of application on target hardware
target.Breakpoint Provide breakpoint details for debugger
target.DebugIOTool Debug byte stream I/O tool service interface
target.ExecutionService Describe implementation of execution service for target application
target.ExecutionTool MATLABservice interface for tool that manages application execution on target hardware
target.MATLABDependencies DescribeMATLABclass and function dependencies
target.ApplicationExecutionTool Capture system command information to run application fromMATLABcomputer
target.Command Capture system command for execution onMATLABcomputer
target.HostProcessExecutionTool Capture system command information to run target application fromMATLABcomputer
target.SystemCommandExecutionTool Capture system command information to run target application fromMATLABcomputer
target.Function Provide function signature information
target.Timer Provide timer details for processor

Objects

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rtw.connectivity.ComponentArgs Provide parameters for each target connectivity component
rtw.connectivity.Config Define connectivity implementation that comprises builder, launcher, and communicator components
rtw.connectivity.ConfigRegistry Register connectivity configuration
rtw.connectivity.MakefileBuilder Configure toolchain-based build process
rtw.connectivity.Launcher Control downloading, starting, and resetting of a target application
rtw.connectivity.RtIOStreamHostCommunicator Configure development computer communications with target processor
rtw.pil.RtIOStreamApplicationFramework Configure target-side communications

Functions

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rtIOStreamClose Shut down communications channel
rtIOStreamOpen Initialize communications channel
rtIOStreamRecv Receive data through communication channel
rtIOStreamSend Send data through communication channel
rtiostreamtest Test customrtiostreaminterface implementation
rtiostream_wrapper Testrtiostreamshared library functions inMATLAB
piltest Verify custom target connectivity configuration for金宝appPIL simulation

Packages

target Manage target hardware information

Apps

SIL/PIL Manager Verify generated code

Topics

SIL and PIL Simulations

An overview of software-in-the-loop (SIL) and processor-in-the-loop simulations (PIL).

Choose a SIL or PIL Approach

Test code generated from top models, referenced models, or subsystems.

Create PIL Target Connectivity Configuration for Simulink

Customize PIL simulation for your target environment.

Host-Target Communication for Simulink PIL simulation

Use thertiostreamAPI for communication between your development computer and target hardware during a PIL simulation.

Specify Hardware Timer

使用代码Replacemen指定一个硬件定时器t Tool.

Set Up PIL Connectivity by Using target Package

Provide PIL connectivity between Simulink®and the target hardware.

Custom Toolchain Directives Required for Code Coverage and Execution Profiling

Specify compiler directives for building PIL application that supports code coverage analysis and execution profiling.

Configure and Run PIL Simulation

Set up and run top-model PIL, Model block PIL, and PIL block simulations.

SIL/PIL Manager Verification Workflow

A simplified workflow for verifying generated code.

PIL Simulation Sequence

How a PIL simulation proceeds.

Simulation Mode Override Behavior in Model Reference Hierarchy

How the simulation mode of the top model or parent model determines the simulation behavior of a model hierarchy.

Field-Oriented Control of Permanent Magnet Synchronous Machine

Simulate motor control system, generate controller code, and use PIL simulation to test numerical equivalence and profile code execution times.

Security for PIL Simulations

Security measures for PIL simulations.

SIL and PIL Limitations

Modeling and code generation features that are not supported or partially supported by SIL and PIL simulations.

Troubleshooting

View SIL and PIL Files in Code Generation Report

Produce a code generation report and static code metrics that cover SIL and PIL files.

Verification of Code Generation Assumptions

The SIL or PIL simulation checks code generation assumptions.

Featured Examples