从系列:视觉处理FPGA
Jack Erickson, MathWorks
Vision processing algorithms are compute-intensive to simulate. Once a design has been verified as much as possible with simulation, prototyping on an FPGA development kit allows for real-time processing of live video input. This example adds a hardware-software interface to the lane detection example and uses the Computer Vision Toolbox™ Support Package for Xilinx®Zynq®-Based Hardware to efficiently build a working prototype.
Learn how to:
• Use HDMI video input to Simulink®
• Design hardware-software interface control functionality
• Generate HDL and software drivers with AXI4 interfaces
• Deploy software to a connected Xilinx Zynq device
• Run a prototype in external mode
Part 1: Vision Processing FPGA and ASIC Hardware ConsiderationsLearn about some of the key factors to consider when targeting a vision processing algorithm to FPGA or ASIC hardware.
Part 2: Workflow from a Frame-Based Algorithm to a Pixel-Streaming ImplementationReuse MATLAB vision processing scripts and algorithms to verify a Simulink hardware implementation.
Part 3: Hardware Design of a Lane Detection AlgorithmLearn about the hardware implementation techniques used in the Vision HDL Toolbox lane detection example.
Part 4: Targeting a Lane Detection Design to a Xilinx Zynq DeviceGenerate optimized fixed-point HDL to target the lane detection example to FPGA fabric.
Part 5: Hardware-Software Prototyping of a Lane Detection DesignPrototype a hardware-software implementation of an automated driving application using the Computer Vision Toolbox Support Package for Xilinx Zynq-Based Hardware.
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